Sollicitatievragen voor engineer gedeeld door sollicitanten
You have to design an LDO with an output voltage of 2V and a supply of 3.6. What is the problem and how do you solve it?
From the formulation of the question it was clear that there was a voltage stress on the device, but I needed informations on the technology to answer that (maximum voltage rating, ..). I didn't obtain any detail. I could not think of any solution to the problem (I was assuming CMOS technology), when he told me: you use a DMOS as a pass-device. Well, he did not even say that the technology was BCD..
I think the first one question is efficiency, cause this LDO would have the terrible efficiency = 2/3.6 is just around 56%.
Were this questions for a graduate vacancy? or experienced Analog designer (2-3 years)